Sr. Design Verification Engineer
Bachelor’s degree in Computer Science, Engineering, Computer Information Systems, Computer Engineering, Software Engineering or a closely related field of Engineering
Area of Expertise:
SSD, PCIe, Ethernet, HBM-DDR, Processor verification, floating-point computational unit, C/C++, and Scripting (Perl, Python).
Roles & Responsibilities:
- Develop a block-level test plan, UVM test bench components such as agents (drivers/monitors), scoreboard, constrained random test cases based on UVM sequences, assertions.
- Develop and close functional coverage, code coverage.
- Independently execute on test plan, run simulations, and debug/triage regression failures.
- Develop required scripting in Perl or python.
- Creation of verification environments using UVM methodology.
- Pre-silicon functional verification at the block, chip, and system level.
- Creation of test plan.
- Functional coverage and code coverage closure.
- Writing scripts to check regression results.
- Performance measurement of blocks.
- Gate level simulation.
- Advanced Test development using SSD, PCIe, Ethernet, HBM-DDR, Processor verification, floating point computational unit, C/C++, and Scripting (Perl, Python).