GDDR6 Test Chip




Embedded & Semiconductor


The customer is one of the top electronic equipment manufacturers. They wanted to test graphic chip (GDDR6) to enhance the performance of the chip.

Design Feature

It was a complex project as this involved the first ever GDDR6 chip test using 8LPP technology. It involved additional requirements like

  • IP Max frequency of 6GHz and controller frequency of 1.5GHz
  • Hierarchical based implementation with SOC and multiple Hard-macros
  • Each block having >1 million instances


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Ownership of Time Constraints including the External IO interfaces

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Alignment with Package team on the bump placement

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Regular interaction with RTL and Program Management team based out of Korea

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Very tight/difficult to meet 6GHz and 1.5GHz frequencies

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RTL development was in parallel to the PnR execution

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Meeting the schedule for final phase & Customer Recognition and getting the work done in 6GHz